Software strategies to extend battery life

From a software perspective, there are some less obvious tricks to reduce power consumption. As stated in a previous post, the best way to conserve power is to stay in the lowest power state for as long as possible. Since run mode with the CPU actively executing instructions is never the lowest power state, we want to minimize the amount of work the CPU must perform. This allows the CPU to complete tasks faster and allows the MCU to return to a low power mode. So, here are some tips for reducing the CPU execution time.

Data types

Match the default data type to the CPU. When writing C code, it is easy to forget that the common integer is usually defined as 16 or 32 bit number, even on compilers for 8-bit MCUs. For 8-bit devices, always default to using the 8-bit char type unless a larger size is really necessary. Even then, you may be able to reduce code size by breaking a 16-bit or 32-bit number into 8-bit slices and only concatenate at the end of the data manipulation.

Conversely, a 32-bit CPU can typically manipulate and move 32-bit data more efficiently than manipulating or moving four 8-bit values. However, if the data really only needs 8-bits, it would be more efficient to use an 8-bit char instead of an integer.

Avoid short loops and small functions

Avoid using short loops or subroutine calls if you can afford the extra memory to use in-line code. Every loop and subroutine uses additional CPU cycles to either determine if the loop is complete or to stack and unstack the program counter. If you know a short loop will always be executed four times, just write the same code four times in a row rather than using a for-next or while loop. If a subroutine only has 10 or 20 bytes of code, consider in-lining it instead of keeping it a subroutine. This will eliminate a fair amount of CPU overhead for simple tasks.

Pre-calculate values

Pre-calculate values when appropriate. For example, assume a wireless link uses two baud rates depending on what the application is talking to. When writing C code it may be tempting to pass the actual baud rate to the serial interface setup routine rather than the actual prescaler value the serial interface requires. After all, this makes the code more readable. However, this also forces the serial interface routine to calculate the prescaler value from the baud rate every time the baud rate is changed. Calculating the prescaler values beforehand and passing these to the serial setup routine will save CPU cycles and code space.

An extension of the pre-calculating concept is using look-up tables rather than complex calculations. Many MCUs have very efficient instructions and address modes for accessing tabled data. Depending on the complexity of the calculation, this can save quite a bit of CPU effort. If calculations are still required, always check for early exits before starting the routine. A simple example is looking for multiplication by ‘1’ or ‘0’.

 

-Scott

Newer is Not Always Better

To most people, integrated circuits (ICs) are the little black squares in electronic products that make the product work. How they are made or what’s in these black squares is a mystery to most people. But it’s no mystery that when it comes time to build a system, the process used for fabricating an IC makes a big difference in resulting power consumption rates. Most digital ICs are made on silicon wafers. Transistors are formed in the silicon wafers to create circuits. The various process technologies are usually described in terms of minimum transistor geometries, such as 250 nanometer (nm), 120nm or 90nm. To provide some scale, a typical human hair is 1000 times larger than the transistor dimensions, which is why so many transistors can fit onto an IC no bigger than a thumbnail. The more transistors that can be squeezed onto a die, the more functionality can be provided, which normally allows IC manufacturers to charge more money for their products. So, IC manufacturers continue to invest in shrinking process geometries in order to make more money. Currently, the cutting edge of process geometries is between 45nm and 32nm.

The big trade-off

But as always, there are trade-offs. As the saying goes, “there is no free lunch.” As the process geometries shrink, the device characteristics must be tailored to meet the performance requirements of the end products. As the width of transistors shrink, the gate oxide, or insulator, must be made thinner in order to maintain control of the current flow through the channel of the transistor. Since the gate oxide thickness is reduced, the maximum voltage that can be used on these transistors must be reduced to prevent damaging the devices. A lowered device voltage is good for active power since active power is proportional to the square of the voltage. However, this typically means that the threshold voltage of the CMOS transistor is reduced in order to maintain transistor performance at a lower voltage. The lowered threshold voltage of these small geometry devices allows more current to leak through the channel even when the device is off. The increase in leakage current is not linearly proportional to the shrinking device size. The increase in leakage is exponential. So, when going from a 130nm process to a 65nm process, the leakage can increase by 1000x! If not controlled, the leakage can be hundreds of milliamps (mA).

Years ago, leakage was ignored in most processes. That is no longer the case. Since the leakage is increasing so quickly, the Freescale design engineers work hard designing transistors that maintain the required performance while keeping the leakage under control. One way to do this is to create several flavors of transistors that can be used in the most appropriate ways, such as low performance, low leakage transistors for circuits that don’t need high performance but need low leakage. Or building high performance, high leakage transistors for circuits where performance is critical and the additional leakage can be supported.

Choosing the right components

So what does this mean when it comes time to choose the components for a low power system? The answer depends on the type of system you are developing.

A: If your system is running all the time, such as a network server, then selecting components that can operate at the lowest voltage is probably the best, since it minimizes active power consumption. Typically, components made in the newer technologies support the lower voltage supplies.

B: If your product is in a low-power state most of the time, such as a smoke detector, a low standby current component is probably the best. Typically, components made in the older process technologies have lower standby or leakage currents.

C: If your product is sometimes active and sometimes in standby, such as a mobile phone, a compromise is required to balance a component’s active power and standby power consumption. Components specifically designed to optimize both active and standby power should be chosen. Typically, components made in the newer technologies that also incorporate leakage control techniques meet the critical demands of the end products.

These guidelines are just general rules. Your product’s specifications will dictate the exact requirements for component selection. If more discussion is required, please send in your comments.

— Chris

New Low Power Run and Low Power Wait Modes. What’s new about them?

Hi, folks,

If you are one of our microcontroller customers, hopefully by now you have heard about our newest MCU family, the Flexis(TM) QE series, which unites our 8-bit S08 MCUs with our new higher-performance 32-bit ColdFire V1 MCUs. We have introduced a few new features on this family intended to help you extend battery life. Two new features I’d like to discuss in detail are the new low power run and low power wait modes.

Issue: the need to run slow
In my first posting, I discussed using the high clock frequencies to reduce average system current by reducing the amount of time spent in higher power run mode and maximizing time spent in the lowest power stop modes. However, this approach may not always be practical. For example, you may need to run a peripheral that doesn’t run in one of the stop modes, such as a timer or UART.

All of our S08 and ColdFire MCUs have on-chip voltage regulators that are active anytime the MCU is in run or wait modes. Therefore the MCUs have a DC offset current that never goes away in these modes. As a result, the slower the operating frequency, the less efficient the MIPs per uA becomes.

Why can’t all peripherals run in stop mode?
There are a couple of reasons many peripherals cannot run in the stop modes. In these modes, the system bus clock is disabled to save power. The peripherals that can run in stop mode either do not require a clock (e.g., analog comparator) or have a built-in clock source (e.g., analog-to-digital converter). The changes to enable the system bus clock in stop modes are non-trivial.

Another reason is that the voltage regulator goes into a low power “loose” regulation mode when one of the stop modes is entered. In this loose regulation state, the regulator can only supply enough current to power a few modules. The current required to run all modules would drain the regulator causing voltage drops that could fall below the minimum operating voltage.

Solution: low power run and wait modes
To resolve these issues, our designers created a new voltage regulator that can provide enough current in its loose regulation mode to power all peripherals at a limited frequency. However, we still had the issue with the bus clock being off in stop modes.

Instead of redesigning our clock architecture to allow the bus clock to run in stop modes, we decided to create two new modes: low power run and low power wait. As you might guess from the names, these modes are simply the standard run and wait modes with the voltage regulator in loose regulation. By taking this approach, we are able to offer full functionality of our peripherals in a very low power state. In addition, the low power run mode allows code execution at a much more efficient MIPs per uA at low frequencies.

Using low power run and wait modes
Using the new low power modes requires configuring just a couple of modules: the clock source (ICS on the QE family) and the low voltage detect (LVD). The clock source must be configured to be running off of an external clock or the crystal oscillator. The reason for this is that the internal clock sources for the S08 and V1 MCUs require a current source that needs the regulator to be in full regulation mode. Therefore, the internal clocks must be disabled. Also, the CPU clock frequency must be limited to 250 kHz to ensure that the regulator is not overloaded if all modules were to be enabled.

The LVD module must also be disabled to enter the low power modes since it requires a bandgap voltage reference that is only available when the regulator is in full regulation. Now we did pull a little trick here. The LVD module can either be disabled by clearing the LVD enable bit (LVDE) or the module can be enabled as long as the LVD stop enable bit (LVDSE) is clear. In this second case, when the MCU is in standard run or wait modes, the LVD is active. When low power run or wait is entered, the LVD will automatically shut down and then restart when the low power mode is exited.

Not a one-off solution
I hope you found this discussion useful and even more importantly, I hope you find these new low power modes useful. These new modes will be standard on our low voltage S08 and ColdFire V1 MCUs moving forward, so it is beneficial for us to make sure our customers are aware of them and understand how the modes can benefit your low power applications.

-Scott

Holistic Approach to Energy Efficient Products

This posting will be an initial discussion on creating energy efficient products. There is no silver bullet for energy reduction meaning that you can’t attack the power problem on a single front. Power is distributed and should be optimized at all levels of the system for the system to be energy efficient. The teams in Freescale are working in multiple areas to enable low power products. These areas are highlighted in the Freescale Energy Efficiency Target

Figure 1: Freescale Energy Efficiency Target.

Process Technology

At the lowest level, the process technology is the foundation of integrated circuits. As the digital process technology continues to scale to smaller dimensions, the leakage current is increasing exponentially which means leakage is becoming a very big problem for components made in deep sub-micron CMOS technologies.

Packaging

Packaging and PCB design can detrimentally impact product power due to the large parasitic capacitances, inductances, and impedances that the circuit IOs must drive to transfer information between components.

Circuit and Module Design

For power reduction in circuit and module designs, we target both active and static power savings. In order to reduce active power, we use techniques such as clock gating or dynamic voltage and frequency scaling in our products. In order to reduce static power, we reduce the voltage or use some form of power gating on high leakage modules. These techniques have trade-offs and many require software to enable these techniques in a platform.

Component Design

The architecture and implementation of components such as microprocessors, application processors, baseband processors, power management ICs, and RF components will dictate the power of the component. We work hard to ensure that only modules to enable the required use cases are used at the lowest frequencies to meet the performance targets.

Platform Design

Platforms are made up of components and software to form an end product. The components you select and how you connect them up for a final product can have a significant impact to the system power.

System and Application Software

Software plays a key role in power consumption. Energy in your system can be squandered away if your software does not take advantage of all power reduction techniques implemented within the hardware.

Tools and Modeling

Tools and modeling are key to understanding where the power is being consumed in a system. This understanding allows us to identify areas in the hardware and software to optimize and to design out the power of the system.

In future posts, I will discuss each area in more detail and provide example techniques that can be employed to reduce power of the overall system. Please let me know if there are any specific topics regarding low power that is of interest and that I may address in a future post.

- Chris

Clock Management for Low Power Applications

For this posting, I’d like to discuss some tips on conserving power through clock management. Many designers equate low power to slow clock frequencies. However, depending on what the MCU is doing and what low-power modes are available on the MCU, running at top speed can actually save power.

What is clock management?

If the MCU has an efficient low-power mode, then you will save the most power by spending the most time in this mode. So if the CPU needs to execute code before returning to sleep, running at the fastest possible speed to complete code execution and return to low-power mode can burn less current than running constantly at slow speeds.

Example of clock management

Take for example the following scenario, a control panel gets a variable update once every 1 second and it takes 16,000 bus cycles to compute the data to be displayed. Running with a typical 32 kHz crystal and assuming a common divide-by-two bus clock, we have a 16 kHz bus, in which case it takes 1 full second to complete the calculations. Now, if we can run at 10 MHz bus clock, it only takes 1.6 milliseconds to complete the calculations and 999.4 milliseconds can be spent in a low power mode.

Other considerations

Of course, not every task an MCU has to perform will benefit from top speed performance. Let’s say our control panel example has a wireless data link. The time required for the wireless communication may not require an 8 MHz bus rate if the wireless data rate is fairly slow. In this case, to minimize power consumption, we want to run the MCU as slow as possible until the wireless communication is complete.

Flexible clock sources

So ideally, we need an MCU with a flexible clock source. Many MCUs have frequency-locked loops (FLLs) and/or phase-locked loops (PLLs) that support multiple frequencies. These allow you to multiply and divide the bus speed to meet the needs of the task and minimize power consumption. The best examples allow the use of external or internal reference clocks and allow you to switch the FLL/PLL on and off on the fly without the need to reset the device.

Feedback

Since this is the first post, let me know if you found it helpful by adding a comment. Also, let me know what low power topics you’d like to see addressed in future posts.

-Scott

Welcome!

Welcome to Freescale’s Energy-Efficient Applications Blog. Our discussions will offer tips and tricks for low-power applications. We will be highlighting new microcontrollers and processors with features and technology that help you stay within your energy budget. The idea is to provide more information than you would normally get from a specification.

We also want to hear from you. Are the posts providing useful content? What topics would you like to discuss? What challenges do you face with your low power designs?

Our goal is to have new content posted every two weeks, so come back and visit regularly. You can also subscribe for updates so that you’ll be notified when new articles are posted.